Promotion zu Doktor-Ingenieur
PhD Thesis in Cooperation with the Chair of Computer Science, Chemnitz University of Technology about: "Investigations of Cost Optimisations for Hardware Emulators by using Methods of partial dynamic Reconfiguration"
Diploma study of Electrical Engineering at the Dresden University of Technology
High School Diploma at Grammar School for Economy Ilmenau, Germany
Zuständig für einen größeren und mehrere kleinere Accounts. Projektleitung für Entwicklungsprojekte in der mobilen Nachrichtentechnik, Mobilfunk für LTE. Geschäftsentwicklung für Messtechnik im Mobilfunkbereicht - Marktanalyse, Kontaktaufnahme von potentiellen Kunden, Systemspezifikation und Erstellung von Geschäftsmodellen.
Consulting for Optimization the Field Logistics
Assembly of the Field Technology Transfer, Founding of the Transfer Enterprise SE&TTCom in cooperation with the chair of Computer Engineering, Project-Acquisition, R&D, Automotive (CAN, FlexRay, Embedded Software/Hardware Systems), Project-Leading (Embedded Hardware),
Responsible for project part “On-chip monitoring” in the government aided project “URANOS” to investigate techniques for robust design of nanometre chips
Development of an embedded optical system and integration of an image sensor - DSP interface
Development of a noise generator for qualified testing of ADSL-connections on the basis of a Matlab-controlled hardware
Student project: Implementation of a Reed Solomon Decoder on a high parallel signal processor architecture
Enhancement of a multiplier unit for vector processor architectures
Optimization of a Reed Solomon Decoder for DVB-T Standard
Development of a test environment for automated tests of Java Graphical User Interfaces (GUI)
Programming of an active visual DSP image for accelerated programming in Java
Development of algorithms to analyse signals for optical measurement of gas-content in medical context
Core Capabilities Hardware Emulation /Rapid System Prototyping, Hardware Software Co-Design, Wired/Wireless Communications, FPGA-Synthesis, Analyses of On-Chip Networks, Design and Test of Multi-Processor Architectures, Design of Cache Hierarchies, Assertion Based Verification, Functional Verification, Automated Test Case Generation, In-Loop Test Adaptation, Heterogeneous Simulator Coupling
Architectures μController, SIMD-DSP, MIMD-processors, MP-SoC, embedded systems, PowerPC, real-time systems
Networks Industry automation, RFID, .15.4-wireless standards, WLAN, heterogeneous sensor/aktor networks
Board Design Automation PCB-Design, circuit board assembly, electrical tests, in-circuit design
Tools Matlab/Simulink, ModelSim, Questa, Xilinx Development Tools, HDL-Designer, FPGA Advantage, Eclipse, all MS-Office
Programming Languages VHDL, Verilog, C, SystemC, Java, Matlab/Simulink
soft-skill courses (English, team-work organisation)
