Curriculum Vitae

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Main skills:    
Digital design: VHDL, Verilog, ModelSim;

Work Activity:

Digital designer at NetApp Intl. srl, Bucharest, Romania
I have accomplished the following projects: (implemented in FPGAs):
FPGA design for a network security appliance which  include serial communication (full-duplex) with four channels based on: SPI (serial peripheral interface) and three UARTs with modem control signals (for interface block) and buffers implemented as Dual Ram (in block memory of the FPGA). The devices communicate based on i960 bus protocol and RS-232 serial protocol. It was designed at RTL level (using VHDL) and run over 200Mhz.

For the same board I have implemented the second FPGA for a PCI bus interface 66 Mhz, 64/32-bit for 3.3 V (0-66 MHz4);
it was implemented in a XCV400E-6FG676 Xilinx FPGA device
This interface supports a bandwidth of up to 528 MBytes/sec.
Both FPGA devices are connected to an Intel processor and are requested to ensure the connectivities to a PCI bus and serial lines for data download and upload.
The FPGA-es have been designed and tested fully with WebPack Xilinx tool and ModelSim.

I2C bus controller. The FPGA was implemented in a Xilinx CoolRunner CPLD.
The FPGA-s was tested both software (by means of high-tech ChipScope soft) and also hardware with a digital oscilloscope.
Software used:
ModelSim, Leonardo Spectrum, WebPack (for synthesis, implementation),
ChipScope (Xilinx tool for testing FPGA), Logic Analyser (testing FPGA)


I have achieved a part of a large testbench for the ASIC - XMAC 10-Gigabit Ethernet MAC controller. The sistem testbench developed by me achives the following test functions: interface of the input-output controller, buffers management (8K Transmit FIFO, 16K Receive FIFO), statistical data processing (for both receive and transmit data) and communication with internal core: memories, main controller.
It was tested also one of the main function of this controller: extension of Ethernet capabilities of providing higher bandwidth for multimedia distributed processing, imaging, medical, CAD/CAM  by improving the performance of LAN backbone and server. The controller complies with the IEEE 802.3ae Ten-Gigabit Ethernet standard.

Others:  verification and design projects;







Education:
1994 - 1999: BS degree in Electronic Engineering at Faculty of Electronics and Telecommunications, Microsystems department,  Bucharest,
2000 - 2001: Master studies at Numerical Methods department, Faculty of Electrotechnics, Bucharest

Languages:
English  - fluently (reading, speaking and writing)
German – beginner (reading, speaking and writing)

Others:   -Driving license (since 1998),

Contact:
Address:           Str. Aleea Baiut NR. 13, bloc A34, apt 46, Sector 6, Bucharest, Romania
Telephone:       xxxx xxx xxx xxx

E-mail:   xxxx_xxxx@xxxxx.xx.xx
Date and Place of Birth: 04 July 1975,  Bucharest, Romania

Strong attitude: friendly, prone to continuous learning;